The present invention generally relates to facsimile reception apparatuses of facsimile transceivers and, more particularly, to a facsimile data processing system for a facsimile reception apparatus which is desirable for the transfer of decoded video data to a printing section during reception of facsimile data.
In a facsimile reception apparatus of a facsimile transceiver, coded data transmitted from a remote transmitter are usually decoded by a decoder into original one line of video data. The decoded one line of data are transferred to a printing section to be reproduced thereby on a recording medium. Under ordinary conditions, the rate of printing one line of data at the printer is not identical with the rate of decoding one line of data at the decoder. An expedient hitherto known for coordinating such different processing rates at the decoder and printer consists in interposing a buffer memory between the decoder and the printer.
In a prior art facsimile receiver with such an expedient, coded data arrived thereat from a remote transmitter are passed to a decoder through a modem and a communication control. The decoder of such a receiver generally comprises a shift register, a run-length code conversion table, a run-length counter, a line buffer and a clock pulse generator.
As the shift register of the decoder is filled with one run-length code, the code is transformed by the run-length conversion table into a corresponding numerical run-length value. This numerical value is loaded in the run-length counter whereupon the clock pulse generator is triggered to produce clock pulses. The run-length counter is progressively decremented by the clock pulses while the line buffer is sequentially supplied with logical "1" or "0" indicative of "black" or "white" also in response to the clock pulses. Upon the decrement of the counter to zero, the clock pulse generator is deactivated. Such a procedure is repeated in sequence for each run-length until the decoder decodes all the one-line data. One line of video data thus stored in the line buffer are transferred to the buffer memory which is connected between the decoder and a printing section of the receiver. Simultaneously, previous one line of video data are fed from the buffer memory to the printing section to be reproduced thereby on a sheet of paper.
The buffer memory between the decoder and the printer as well as the line buffer in the decoder is indispensable in the prior art facsimile receiver. This makes the construction complex and costly and, additionally, requires a disproportionate period of time for the data transfer which eventually slows down the processing received data.
Tremendous progress has been made recently in the rationalization of facsimile transceivers utilizing microcomputers to implement heretofore discrete functions under program and interrupt control. An example of such a system is disclosed in commonly assigned U.S. Pat. No. 4,297,727, issued Oct. 27, 1981 which is incorporated herein by reference. More specifically, the various functions of inputting received data, decoding the received data, transferring the decoded data to a printing section and control of the printing operation are performed by a microcomputer. The various operations are performed by subroutines on a time sharing basis under the control of a priority interrupt system.
As will become clear from the following description, operations including the inputting of received data (A), decoding the data (B), transferring the decoded data to a printing section (C) and performing line feed of the printing apparatus and the actual printing operation (D) are conventional and known per se. These operations may be performed by a microcomputer under program and interrupt control as disclosed in detail in the above discussed U.S. patent. The details of these operations do not constitute the subject matter of the present invention and may be performed in any suitable manner such as described in the patent.
The present invention constitutes a novel and unobvious improvement over the Assignee's previous system as disclosed in the patent relating to the manner in which the overall interrupt control is performed. In the prior patent, the interrupt control involves the management of four duties, F, G, I and H. Duty I, which is normally performed, is the decoding of received data including transfer from a FIFO area to an RBF area of a random access memory RAM. Duty F involves the setting and resetting of memory full and data read flags. Duty G comprises the receiving and storing of data in the FIFO area of the RAM. Duty H involves the reading out of the decoded data from the RBF area of the RAM and the printing of the data. The priority interrupt system is such that F&gt;G&gt;H&gt;I.
The present invention improves over the prior patent in the rationalization of the priority interrupt system by management of the subroutines (A), (B), (C) and (D) discussed above rather than the duties F, G, H and I. The unexpected benefits of such rationalization will become clear from the following detailed description.